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Ciranova Helix in Detail
Production Quality Analog Layout
First and foremost, an automated solution must create layout with quality comparable to that produced by an experienced layout designer.
To acheive this, an automated solution must handle all three major quality requirements:
- Circuit requirements, such as location, matching and guard rings, as defined by the circuit designer
- Device requirements, such as well merging, abutment, interdigitation & row stacking, which are required for minimum-area layout. These are understood by all layout designers, but difficult for automated tools to implement.
- Process requirements, defined by the process design rules
Ciranova Helix Delivers Production Quality Results
Ciranova Helix introduces technological advances to automatically achieve all three requirements:
Compact, process-portable constraints capture circuit requiremens
Ciranova Helix uses high-level, process-portable constraints to guide its placement. The format is compact, open and easily understood by circuit and layout designers. Constraints are applied using a point-and-click graphical user interface.
Some earlier attempts at analog layout automation required the user to input extremely granular constraints, for every device and relationship. In contrast, Helix uses relatively few constraints applied at a much higher level, similar to the guidance a circuit designer gives to a layout designer. The mechanics of device manipulation and rule compliance are handled automatically by the tool; the user doesn't need to define them with constraints. To read more about Ciranova Helix constraints and the point-and-click graphical user interface, click here.
Automatic device-level abutting, well merging, interdigitation and row stacking
Ciranova Helix is the first automated analog layout solution that automatically takes advantage of PyCell features such as abutting, well merging, interdigitation and row stacking in order to create more compact layout. By default, Ciranova Helix globally abuts connected devices, merges wells where appropriate, and stacks rows of fingers to achieve denser layout. The user may also choose to specify the behavior of all options on each device if desired.
DRC-correct placement using Ciranova RuleWise Technology
Ciranova Helix placements are DRC-correct-by-construction, even at advanced geometries with DFM and other complex design rules. This avoids the need for tedious manual repair of DRC violations in a layout editor, and enables rapid convergence on optimal layouts.
Ciranova's RuleWise technology enables our products to create design-rule-correct geometry without requiring the end-user to provide process-specific input. To read more about RuleWise Technology and the RuleWise engine, click here
Improved Area Efficiency at 65nm and Below
In many cases, especially at advanced geometries, Helix can produce layout quality superior to handcrafted placement, particularly in terms of area utilization.
Growing design sizes and nanometer geometries have left handcrafted layout methods increasingly unable to produce area- and performance-optimized layouts. First, the manual layout cycle takes so long that development teams have no time for comprehensive floorplan exploration; instead, they typically must "bottom-up" the overall layout, one block at a time. Teams using this method are rarely able to optimize the full design.
Second, the number of design rules at 65nm and 45nm is so large that no human engineer can optimize to all of them at once. Layout designers using manual approaches must focus on a few key rules, and leave space-wasting margin to (hopefully) account for the others.
Ciranova Helix overcomes both limitations. It places the entire circuit concurrently, ensuring a global optimization impossible using the manual approach. Because Ciranova Helix run times are so short, designers can explore multiple floorplan strategies before settling on a preferred one. Ciranova Helix generates multiple optimized layout footprints automatically, giving designers more choices.
Ciranova Helix also incorporates the RuleWise engine to ensure that every layout is design-rule-correct-by-construction. The RuleWise engine can handle the full range of design rules in advanced processes, including DFM, restricted pitch and other complex constructions. The result is layout that takes better advantage of the silicon's full potential. Click here to learn more about Ciranova RuleWise Technology.
Learn More about Ciranova Helix
- Ciranova Helix top page
- Online Demos
- Point & Click Control of Your Layout
- Helix Performance
- RuleWise Technology