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Ciranova Helix: What's New
This page describes new features added to Helix starting with release 3.0 in 2011. Ciranova Helix is currently at release 3.1.
More Powerful Use Model
The most visible enhancements have been to the Helix graphical user interface (GUI). A new unified GUI window presents layout, schematic and constraints together for quick and easy editing.
schematic and constraint views
The new GUI accelerates many common layout tasks:
- Constraint entry and editing using the schematic view. Users can drag devices from the schematic view to the constraint view, or right-click on devices in the schematic to create a new constraint.
- Cross probing between schematic, layout and constraint views. Users can click on a block in the schematic to see the corresponding block in multiple layout views, or click on a constraint to see the included devices in the schematic and layout.
- Dockable windows enable users to customize their environment.
28nm Support
The 28nm process node introduced a host of new and enhanced design rules. Helix creates design-rule-correct layout at 28nm, including support for:
- Layout dependent effects (LDE)
- Dummy poly sharing
- Density requirements
Programmable Constraint Generation: XGen
The interaction between the constraint system and the layout engine is critical to the effectiveness and usability of any automation system. XGen is a general-purpose, programmable analog constraint generation and translation engine, now embedded within Helix, which can be scripted to automatically create a wide variety of Helix constraints. XGen is circuit-aware and has multiple applications, including:
- Companies that have implemented front-end automation environments can use XGen to generate Helix constraints for layout.
- Individuals comfortable with scripting EDA tools can use XGen to automate constraint generation for individual circuits, or to create libraries of XGen routines applicable to their most common circuit classes
To see a good example of the productivity improvements made possible by the XGen engine, take a look at Helix First Look (below).
Automated Initial Layout Creation: HFL
Built on XGen (above), HFL is a application that automatically generates the initial constraint set for a circuit with no additional input from the user. HFL uses process- and design-specific data from a configuration file to analyze the netlist and generate constraints.
Think of HFL this way: in a landscape painting, the sky is always at the top, and the grass is usually green. HFL enables designers to set default rules for automatic implementation.
The combination of accurate DRC handling and even a small number of general rules produces surprisingly good initial layouts. And unlike "gen from source" commands in other tools, HFL is fully hierarchical, handling designs with tens of thousands of devices. The placement it drives Helix to create is based on netlist connectivity, process design rules and predefined constraint sets, instead of symbol placement on the schematic.
HFL does not create final layout. Instead, it very rapidly creates initial constraints, dramatically shortening the time to get to initial layout, and eliminating much of the time-consuming drudgery of repetitive layout tasks.
See It In Action
To see the new Helix features in action, click here to watch online demo videos.