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Capture once, re-use many times
Most ASIC and SoC designs contain analog circuitry, especially in the consumer, wireless, and networking IC markets. The analog portion of mixed-signal designs is a crucial differentiator but it's also too often the cause of schedule delays and yield problems. Since most analog design involves the re-implementation of legacy circuits for new processes, a simple solution to these problems would be to re-use proven circuits. The typical analog design flow, however, provides very little re-use leverage. What is needed, therefore, is a set of tools that enables designers to capture a design once and re-use it many times.
Ciranova™ has developed such a toolset. Ciranova's Core Technology brings the productivity advantages of language-based design to analog and mixed-signal designers, enabling the creation of reusable and migratable layout generators.