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DR-True Technology:
Enabling Process-Portable Analog Design

Ciranova developed DR-True Technology specifically to solve the three critical hurdles of analog layout automation. DR-True technology effectively eliminates the need for layout and PyCell designers to wrestle with process-specific requirements, enabling the creation of process-portable analog circuit layout and PyCell Libraries.

A New Approach to Layout Generation

Helix Core

The DR-True TechDB is derived from existing design rule sources. The DR-True Engine creates design-rule-correct layout for PyCells and Ciranova Helix, eliminating the need for users to specify design rule behavior

Traditional approaches to PCell design and analog layout automation require users to specify design rule related behavior. Ciranova DR-True Technology represents a fundamental advance because it combines two sophisticated software components that automatically capture and implement process requirements. These components are:

The DR-True Technology Database
The DR-True Technology Database handles all technology information, including data about layers and layer relationships, physical design rules and electrical design rules. Physical design rule sets can include simple minimum spacing rules, recommended rules and/or complex conditional rules, as used in typical DRC engines. The DR-True Technology Database also provides support for multiple simultaneous rule sets, which is often required to meet DFM requirements.

The DR-True Engine
The DR-True Engine has much in common with geometry engines that power many DRC programs. However, rather than checking layout to flag errors, the DR-True Engine is used to construct design-rule-correct layout using process data contained in the DR-True Technology Database. Both Ciranova Helix and PyCell Studio access the DR-True Engine to create layout that is design-rule-correct for the target process technology.

The Result: Space Efficient, Design-rule-correct Layout

The goal of every circuit and layout designer is to create compact layout that meets performance objectives and is design-rule-correct. Ciranova DR-True Technology automatically creates space efficient, design-rule-correct layout, so that designers can focus their efforts on circuit function and performance.

 

XPyCell
Universal OpenAccess PCells, created using Ciranova's PyCell Studio software. PyCells are authored using the popular Python programming language, hence the name.
XAMS
Analog/Mixed Signal
XPyros Layout Viewer
A component of Ciranova's PyCell Studio software. The Pyros Layout Viewer can open any OpenAccess block, select layout objects for examination, and manipulate PyCell parameters. Pyros also includes a built-in design rule checker that allows users to check the layout interactively.